Device simulation of nano-scale MOSFETs based on bandstructure calculation

被引:0
|
作者
Institute of Microelectronics, Tsinghua University, Beijing 100084, China [1 ]
机构
来源
Pan Tao Ti Hsueh Pao | 2006年 / SUPPL.卷 / 248-251期
关键词
10;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 50 条
  • [1] Quantum simulation of nano-scale Schottky barrier MOSFETs
    Shin, M
    Jang, M
    Lee, S
    2004 4TH IEEE CONFERENCE ON NANOTECHNOLOGY, 2004, : 396 - 398
  • [2] Doping profile effects on device characteristics of nano-scale MOSFETs
    Takeda, H
    Mori, N
    SISPAD: 2005 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 2005, : 247 - 250
  • [3] Quantum potential approaches for nano-scale device simulation
    Tsuchiya, H
    Winstead, B
    Ravaioli, U
    VLSI DESIGN, 2001, 13 (1-4) : 335 - 340
  • [4] Nano-scale Silicon MOSFETs: Modelling and simulation challenges in the ballistic limit
    Dayal, Aditya
    Shrivastava, Anuj Kr
    Vidyarthi, Abhay
    Akashe, Shyam
    2013 ANNUAL INTERNATIONAL CONFERENCE ON EMERGING RESEARCH AREAS & 2013 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, COMMUNICATIONS & RENEWABLE ENERGY (AICERA/ICMICR), 2013,
  • [5] Noise in Nano-scale MOSFETs and Flash Cells
    Shin, Hyungcheol
    Yang, Seungwon
    Jeon, Jongwook
    Kang, Daewoong
    2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 88 - +
  • [6] Fullband simulation of nano-scale MOSFETs based on a non-equilibrium Green's function method
    Fitriawan, Helmy
    Ogawa, Matsuto
    Souma, Satofumi
    Miyoshi, Tanroku
    IEICE TRANSACTIONS ON ELECTRONICS, 2008, E91C (01) : 105 - 109
  • [7] Nano-scale simulation by the use of supercomputer electronic structure calculation of materials
    Miyamoto, Yoshiyuki
    Takahara, Hiroshi
    NEC TECHNICAL JOURNAL, 2007, 2 (01): : 63 - 66
  • [8] Nano-scale simulation technologies
    Nakada, T
    Aoki, K
    Furuya, A
    FUJITSU SCIENTIFIC & TECHNICAL JOURNAL, 2006, 42 (01): : 103 - 112
  • [9] A Quantum Transport Approach to the Calculation of Gate Tunnelling Current in Nano-Scale FD SOI MOSFETs
    Hasani, Fargol
    Fathipour, Morteza
    Karimi, Fatemeh
    ULIS 2009: 10TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION OF SILICON, 2009, : 337 - +
  • [10] Linearity Characterization of Nano-Scale Underlap SOI MOSFETs
    Singh, Indra Vijay
    Alam, M. S.
    2013 ANNUAL IEEE INDIA CONFERENCE (INDICON), 2013,