Quantum confinement effects in strained silicon MOSFETs

被引:0
|
作者
Department of Electrical Engineering, Indian Institute of Technology, New Delhi 110 016, India [1 ]
机构
来源
Int. J. Nanosci. | 2008年 / 2-3卷 / 81-84期
关键词
Nanotechnology - MOS devices - Oxide semiconductors - Strained silicon - MOSFET devices - Quantum confinement - Silicon on insulator technology - Metals - Silicon compounds;
D O I
10.1142/s0219581x08005195
中图分类号
学科分类号
摘要
In this paper, we have examined the effect of quantum confinement of carriers on the threshold voltage of strained-silicon (s-Si) nanoscale Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). Using results from quantum theory and two-dimensional simulation, we show that strain-induced threshold voltage roll-off in s-Si nanoscale MOSFETs can be overcome by decreasing s-Si layer thickness. Based on our simulation study, we provide an optimization between threshold voltage, strain and s-Si layer thickness. © 2008 World Scientific Publishing Company.
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