Chip-package codesign efforts continue

被引：0
|
作者：
机构：
来源：
Semiconductor International | 2006年 / 29卷 / 09期
关键词：
(Edited Abstract);
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [1] CAD flows for chip-package Codesign
    Varma, A
    Glaser, A
    Franzon, P
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2003, : 11 - 14
  • [2] Chip-Package Codesign with Redistribution Layer
    Suryakumar, Mahadevan
    Mekonnen, Yidnek
    Sarangi, Ananda
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, 2009, : 231 - 234
  • [3] Electrical modeling and simulation challenges in chip-package codesign
    Cangellaris, AC
    IEEE MICRO, 1998, 18 (04) : 50 - 59
  • [4] New route in system integration: Chip-package codesign
    Troster, G
    IEEE MICRO, 1998, 18 (04) : 7 - 9
  • [5] Optimal chip-package codesign for high-performance DSP
    Mehrotra, P
    Rao, V
    Conte, TM
    Franzon, PD
    IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2005, 28 (02): : 288 - 297
  • [6] Chip-package codesign for high-frequency circuits and systems
    Lin, J
    IEEE MICRO, 1998, 18 (04) : 24 - 32
  • [7] Chip-package codesign for high-frequency circuits and systems
    Lin, Jenshan
    IEEE Micro, 18 (04): : 24 - 32
  • [8] Chip-package codesign flow for mixed-signal SiP designs
    Brandtner, T
    IEEE DESIGN & TEST OF COMPUTERS, 2006, 23 (03): : 196 - 202
  • [9] Issues in chip-package codesign with MCM-D/flip-chip technology
    Franzon, P
    Schaffer, T
    Lipa, S
    Glaser, A
    IEEE SYMPOSIUM ON IC/PACKAGE DESIGN INTEGRATION - PROCEEDINGS, 1998, : 88 - 92
  • [10] Chip-package codesign of receiver front end modules for RF/wireless applications
    Amin, Y
    Tenhunen, H
    Jamal, H
    Zheng, LR
    Duo, XZ
    2005 IEEE/ACES International Conference on Wireless Communications and Applied Computational Electromagnetics, 2005, : 767 - 770
12345