Scalable in-memory processing of omics workflows

被引:0
|
作者
Elisseev, Vadim [1 ,2 ]
Gardiner, Laura-Jayne [1 ]
Krishna, Ritesh [1 ]
机构
[1] IBM Research Europe, Hartree Centre, Daresbury Laboratory, Keckwick Lane, Cheshire, WarringtonWA4 4AD, United Kingdom
[2] Wrexham Glyndwr University, Mold Rd, Wales, Wrexham LL11 2AW, United Kingdom
关键词
Bioinformatics;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
页码:1914 / 1924
相关论文
共 50 条
  • [21] Efficient In-Memory Processing Using Spintronics
    Chowdhury, Zamshed
    Harms, Jonathan D.
    Khatamifard, S. Karen
    Zabihi, Masoud
    Lv, Yang
    Lyle, Andrew P.
    Sapatnekar, Sachin S.
    Karpuzcu, Ulya R.
    Wang, Jian-Ping
    IEEE COMPUTER ARCHITECTURE LETTERS, 2018, 17 (01) : 42 - 46
  • [22] SHIFFT: A Scalable Hybrid In-Memory Computing FFT Accelerator
    Nalla, Pragnya Sudershan
    Wang, Zhenyu
    Agarwal, Sapan
    Xiao, T. Patrick
    Bennett, Christopher H.
    Marinella, Matthew J.
    Seo, Jae-sun
    Cao, Yu
    2024 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, ISVLSI, 2024, : 130 - 135
  • [23] Challenges in Bioinformatics Workflows for Processing Microbiome Omics Data at Scale
    Hu, Bin
    Canon, Shane
    Eloe-Fadrosh, Emiley A.
    Babinski, Michal
    Corilo, Yuri
    Davenport, Karen
    Duncan, William D.
    Fagnan, Kjiersten
    Flynn, Mark
    Foster, Brian
    Hays, David
    Huntemann, Marcel
    Jackson, Elais K. Player
    Kelliher, Julia
    Li, Po-E.
    Lo, Chien-Chi
    Mans, Douglas
    Mccue, Lee Ann
    Mouncey, Nigel
    Mungall, Christopher J.
    Piehowski, Paul D.
    Purvine, Samuel O.
    Smith, Montana
    Varghese, Neha Jacob
    Winston, Donald
    Xu, Yan
    Chain, Patrick S. G.
    FRONTIERS IN BIOINFORMATICS, 2022, 1
  • [24] Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture
    Gauchi, R.
    Kooli, M.
    Vivet, P.
    Noel, J. -P.
    Beigne, E.
    Mitra, S.
    Charles, H. -P.
    2019 IFIP/IEEE 27TH INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2019, : 166 - 171
  • [25] Scalable In-Memory Computing Architectures for Sparse Matrix Multiplication
    Kendall, Jack D.
    Conklin, Alexander A.
    Pantone, Ross
    Nino, Juan C.
    Kumar, Suhas
    2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM, 2022,
  • [26] Exploring Processing In-Memory for Different Technologies
    Gupta, Saransh
    Imani, Mohsen
    Rosing, Tajana
    GLSVLSI '19 - PROCEEDINGS OF THE 2019 ON GREAT LAKES SYMPOSIUM ON VLSI, 2019, : 201 - 206
  • [27] Multi-Layer In-Memory Processing
    Fujiki, Daichi
    Khadem, Alireza
    Mahlke, Scott
    Das, Reetuparna
    2022 55TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO), 2022, : 920 - 936
  • [28] IMAGING: In-Memory AlGorithms for Image processiNG
    Haj-Ali, Ameer
    Ben-Hur, Rotem
    Wald, Nimrod
    Ronen, Ronny
    Kvatinsky, Shahar
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2018, 65 (12) : 4258 - 4271
  • [29] Gorilla: A Fast, Scalable, In-Memory Time Series Database
    Pelkonen, Tuomas
    Franklin, Scott
    Teller, Justin
    Cavallaro, Paul
    Huang, Qi
    Meza, Justin
    Veeraraghavan, Kaushik
    PROCEEDINGS OF THE VLDB ENDOWMENT, 2015, 8 (12): : 1816 - 1827
  • [30] Special Issue on Near-Memory and In-Memory Processing
    Pande, Partha Pratim
    IEEE DESIGN & TEST, 2022, 39 (02) : 4 - 4