Data cache structure and management strategy optimization of reconfigurable system for multimedia applications

In order to improve the data flow of the reconfigurable system with a lower embedded data memory cost, a data cache optimization method is proposed, including the two-dimensional Cache structure and the related cache management strategy. The experimental results show that the approach is efficient for various multimedia applications, and the memory access performance of the reconfigurable system can be improved by 29.16% to 35.65% with a 4 KB data cache. The proposed data cache structure was adopted in a reconfigurable system and realized with real chip. Based on the the proposed data cache structures, the reconfigurable system can support the 1080p@30fps stream decoding at the clock frequency of 200MHz. Moreover, the performance of the reconfigurable system is 1.8 times higher than that of other reconfigurable architectures. ©, 2014, Dongnan Daxue Xuebao (Ziran Kexue Ban)/Journal of Southeast University (Natural Science Edition). All right reserved.