Design of low-power 24 GHz CMOS low noise amplifier

被引:1
|
作者
Noh S.-H. [1 ]
Ryu J.-Y. [2 ]
机构
[1] Department of Electronics Engineering, Andong National University
[2] Department of Information and Communications Engineering, Pukyong National University
关键词
24; GHz; Automotive radar; LNA (Low Noise Amplifier); Low-power; RF CMOS;
D O I
10.5302/J.ICROS.2021.21.0133
中图分类号
学科分类号
摘要
In this paper, we present a low-power 24 GHz CMOS LNA (Low Noise Amplifier) for automotive collision avoidance radar. The proposed circuit was fabricated using the 65-nm RF CMOS technology and powered by a 1.2 V supply. To decrease the power consumption and increase the voltage gain, a cascode scheme was implemented in this circuit, and it was optimized to decrease the noise figure. Compared to the recently reported LNA, our proposed LNA showed the lowest power consumption and noise figure of 4.59 mW and 2.98 dB, respectively, with a high voltage gain of 24.3 dB. Additionally, it was designed with the smallest chip area of 0.6×0.6 mm2 and a core cell of 0.31×0.35 mm2 without pads. © ICROS 2021.
引用
收藏
页码:919 / 924
页数:5
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