Failure Mechanism Analysis of 1.2 kV SiC MOSFETs Under Low-Temperature Storage, Power Cycling, and Short-Circuit Interactions

The silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) under real-world operating conditions contends with multistress scenarios, involving thermal, mechanical, and electrical stresses, which in turn impact its reliability and operational lifespan. Consequently, a comprehensive exploration of aging precursors and failure mechanisms becomes imperative for the SiC MOSFETs under diverse stress interactions. This study delved into the repercussions of low-temperature storage (LTS) on power cycling test (PCT) reliability and short-circuit (SC) ruggedness, the impact of PCT on SC ruggedness, and the combined influence of LTS and PCT on SC ruggedness through direct current characteristic tests (dc test), low-frequency noise (LFN) tests, and failure analysis (FA) for 1.2 kV SiC MOSFETs. The outcomes revealed that LTS adversely affected both PCT lifetime and SC withstand time (SCWT), PCT, and LTS and PCT also adversely affected SCWT. These findings provide insights into the reliability and operational lifespan of SiC MOSFETs under real-world operating conditions.