An extensive study on investigating the heterojunction compatibility of novel charge transport materials, defect management and design optimization for high-performance lead-free CsSnl3-based perovskite solar cells

The rising demand for environmentally sustainable energy solutions has driven significant interest in lead-free inorganic perovskite solar cells as alternatives to the toxic lead-based organic counterparts. The unique ABX3 crystal structure of perovskites facilitates the development of innovative materials for energy applications. This study focuses on the inorganic, non-toxic cesium tin iodide (CsSnI3) perovskite as a potential absorber layer in photovoltaic cells. The primary objective is to evaluate the compatibility of CsSnI3 with eight different charge transport layers to identify optimal configurations. Using computational modeling through SCAPS-1D simulation tool, 16 unique cell architectures were designed by combining various charge transport layers, and key parameters such as absorber thickness, charge transport layer thickness, and doping concentrations were systematically optimized to maximize power conversion efficiency. The analysis revealed that variations in band alignment, band offsets, and electric fields significantly influenced device performance, resulting in unique optimized parameters for each configuration. The integration of a back reflection layer and the tuning of electrode work functions further enhanced efficiency. Among the configurations, the nPB/CsSnI3/PEIE cell demonstrated the highest performance with Jscof 35.15 mA cm-2 , Vocof 0.93 V, FF of 87.42 % and PCE of 28.72 %. Additionally, the impact of bulk and interface defect densities, as well as temperature variations, on device performance was examined. The results showed that increased defect densities and elevated temperatures led to reduced short-circuit current density and open-circuit voltage, respectively. This study highlights the potential of CsSnI3 as an efficient absorber material and underscores the importance of optimizing device parameters for superior performance.