A novel linear array for discrete cosine transform

Discrete cosine transform (DCT) and inverse DCT (IDCT) have been widely used in many image processing systems. In this paper, a novel linear-array of DCT and IDCT is derived from the data flow of subband decompositions representing the factorized coefficient matrices in the matrix formulation of the recursive algorithm. For increasing the throughput as well as decreasing the hardware cost, the input and output data are reordered. The proposed 8-point DCT/IDCT processor with four multipliers, simple adders, and less registers and ROM storing the immediate results and coefficients, respectively, has been implemented on FPGA. The linear-array DCT/IDCT processor with the computation complexity O(5N /8) and hardware complexity O(N / 2) is fully pipelined and scalable for variable length DCT/IDCT computations.