共 50 条
- [43] Vector based Dead-Time Compensation for a Three-level T-Type Converter 2015 THIRTIETH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC 2015), 2015, : 1534 - 1540
- [44] Study on a Common-mode Voltage Suppression Method with High Performance for the Three-level Diode-clamped Inverter 2012 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS (ISIE), 2012, : 539 - 544
- [46] Carrier Based PWM Scheme for a Three-Level Diode-Clamped Five-Phase Voltage Source Inverter Ensuring Capacitor Voltage Balancing 2011 TWENTY-SIXTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC), 2011, : 1194 - 1201
- [47] Carrier Based Modulation with Capacitor Balancing for Three-Level Neutral-Point-Clamped qZS Inverter PROCEEDINGS 2015 9TH INTERNATIONAL CONFERENCE ON CAMPATIBILITY AND POWER ELECTRONICS (CPE), 2015, : 57 - 62
- [48] Study and Simulation of Dead-time compensation for the voltage source SVPWM inverter MECHATRONICS AND APPLIED MECHANICS II, PTS 1 AND 2, 2013, 300-301 : 1200 - +
- [49] Dead-time Compensation for a High-Fidelity Voltage Fed Inverter 2008 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-10, 2008, : 4419 - +
- [50] A Novel Method for Dead-Time Compensation of the Inverter Using SVPWM ADVANCES IN MULTIMEDIA, SOFTWARE ENGINEERING AND COMPUTING, VOL 2, 2011, 129 : 563 - 568