A Double-Sided Cooling Approach of Discrete SiC MOSFET Device Based on Press-Pack Package

被引:0
|
作者
Yao, Ran [1 ]
Zhu, Zheyan [2 ]
Li, Hui [1 ]
Lai, Wei [1 ]
Chen, Xianping [3 ]
Iannuzzo, Francesco [4 ]
Liu, Renkuan [5 ]
Luo, Xiaorong [5 ,6 ]
机构
[1] Chongqing Univ, Sch Elect Engn, State Key Lab Power Transmiss Equipment, Chongqing 400044, Peoples R China
[2] Zhejiang Univ, Coll Elect Engn, Hangzhou 310058, Peoples R China
[3] Chongqing Univ, Coll Optoelect Engn, Chongqing 400044, Peoples R China
[4] Aalborg Univ, Dept Energy Technol, DK-9220 Aalborg, Denmark
[5] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Device, Chengdu 610054, Peoples R China
[6] Chengdu Univ Informat Technol, Coll Microelect, Chengdu 610225, Peoples R China
基金
中国博士后科学基金;
关键词
Double-sided cooling; press-pack package; discrete SiC MOSFET device; finite element modeling; performances optimization; POWER MODULE; ALL-SI; RELIABILITY; TEMPERATURE; INDUCTANCE; GENERATION; CONVERTERS;
D O I
10.1109/OJPEL.2024.3479293
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The conventional TO-247-3 packages with single-sided cooling limit the thermal and electrical performances of discrete SiC MOSFET devices. In this paper, a double-sided cooling press-pack (PP) packaging approach for the discrete SiC MOSFET device is proposed to optimize its thermal and electrical performances. First, a double-sided cooling PP structure for the discrete SiC MOSFET devices is designed with a copper foam gate pin and an embedded fixture. Then, based on finite element simulations, the steady-state thermal and electrical performances of the discrete SiC MOSFET device with the double-sided cooling PP package are analyzed, and the parasitic inductance of the designed SiC MOSFET device is extracted by the ANSYS Q3D software. Finally, a prototype of the double-sided cooling PP SiC MOSFET device is fabricated, and test platforms are established to verify its performance. The research findings demonstrate that the designed double-sided cooling PP SiC MOSFET device can reduce thermal resistance and switching loss by 47.4 % and 42.3%, respectively.
引用
收藏
页码:1629 / 1640
页数:12
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