An analytical I-V model of SiC double-gate junctionless MOSFETs

被引:0
|
作者
Li, Yi [1 ]
Zhou, Tao [1 ]
Guo, Zixuan [1 ]
Yang, Yuqiu [1 ]
Wu, Junyao [1 ]
Cai, Huan [1 ]
Wang, Jun [1 ]
Yin, Jungang [1 ]
Huang, Wenqing [1 ]
Zhang, Miao [1 ]
Hou, Nianxing [1 ]
Liu, Qin [2 ]
Deng, Linfeng [1 ]
机构
[1] Hunan Univ, Coll Elect & Informat Engn, Changsha 410082, Hunan, Peoples R China
[2] Zhuzhou CRRC Times Semicond Co LTD, State Key Lab Adv Power Semicond Devices, ,Asia, Zhuzhou 412001, Peoples R China
基金
中国国家自然科学基金;
关键词
SiC; DG JL MOSFET; Subthreshold; Accumulation; I-V; SYMMETRIC DOUBLE-GATE; FIELD-EFFECT TRANSISTORS; CURRENT-VOLTAGE MODEL; TRANSITION;
D O I
10.1016/j.mejo.2024.106445
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Silicon carbide(SiC) double gate junctionless metal oxide semiconductor field-effect transistors(DG JL MOSFETs) have attracted significant attention due to their ideal high temperature characteristics and radiation resistance. Therefore, it is meaningful to exploit an I-V model for SiC DG JL MOSFETs. In this article, we make a linear approximation to describe the relationship between the surface mobile charge density and the surface electron concentration of the device. Based on this approximation and using the one-dimensional Poisson's equation, we solve for the potential distribution of a SiC DG JL MOSFET in the subthreshold region. From this solution, we derived a functional relationship between the surface mobile charge density in the channel and the channel quasi-Fermi potential. Then we successfully developed a unified I-V model for the SiC DG JL MOSFETs. Based on the drain to source current calculation formula, the calculation expressions for the device's transconductance and output conductance are derived. By comparing our model with the results from the two-dimensional numerical simulation software Silvaco Atlas, our model's calculations closely match the two-dimensional numerical simulation results from the subthreshold region to the accumulation region. This model has reference significance for SiC DG JL MOSFETs in the high temperature electronic circuit application field.
引用
收藏
页数:7
相关论文
共 50 条
  • [41] Hole Mobility Model for Si Double-Gate Junctionless Transistors
    Chen, Fan
    Wei, Kangliang
    Sha, Wei E. I.
    Huang, Jun Z.
    2017 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS), 2017,
  • [42] A compact, continuous analytic I-V model for surrounding-gate MOSFETs
    Chiang, TK
    Chen, ML
    2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS, 2004, : 1196 - 1199
  • [43] Compact core model for Symmetric Double-Gate Junctionless Transistors
    Cerdeira, A.
    Avila, F.
    Iniguez, B.
    de Souza, M.
    Pavanello, M. A.
    Estrada, M.
    SOLID-STATE ELECTRONICS, 2014, 94 : 91 - 97
  • [44] Surface-Potential-Based Drain Current Model for Long-Channel Junctionless Double-Gate MOSFETs
    Chen, Zhuojun
    Xiao, Yongguang
    Tang, Minghua
    Xiong, Ying
    Huang, Jianqiang
    Li, Jiancheng
    Gu, Xiaochen
    Zhou, Yichun
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (12) : 3292 - 3298
  • [45] Characterization of transient gate oxide trapping in SiC MOSFETs using fast I-V techniques
    Gurfinkel, Moshe
    Xiong, Hao D.
    Cheung, Kin P.
    Suehle, John S.
    Bernstein, Joseph B.
    Shapira, Yoram
    Lelis, Aivars J.
    Habersat, Daniel
    Goldsman, Neil
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (08) : 2004 - 2012
  • [46] A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs
    Chiang, Te-Kuang
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (09) : 2284 - 2289
  • [47] A subthreshold current model for nanoscale short channel junctionless MOSFETs applicable to symmetric and asymmetric double-gate structure
    Jin, Xiaoshi
    Liu, Xi
    Kwon, Hyuck-In
    Lee, Jung-Hee
    Lee, Jong-Ho
    SOLID-STATE ELECTRONICS, 2013, 82 : 77 - 81
  • [48] A Model of the Gate Capacitance of Surrounding Gate Transistors: Comparison With Double-Gate MOSFETs
    Garcia Ruiz, Francisco J.
    Maria Tienda-Luna, Isabel
    Godoy, Andres
    Donetti, Luca
    Gamiz, Francisco
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (10) : 2477 - 2483
  • [49] Explicit analytical charge and capacitance models of undoped double-gate MOSFETs
    Moldovan, Oana
    Jimenez, David
    Guitart, Jaurne Roig
    Chaves, Ferney A.
    Iniguez, Benjamin
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (07) : 1718 - 1724
  • [50] Modeling of I-V characteristics in symmetric double-gate polysilicon thin-film transistors
    Ma, Xiaoyu
    Chen, Songlin
    Deng, Wanling
    Huang, Junkai
    AIP ADVANCES, 2017, 7 (06):