Several AES variants under VHDL language In FPGA

被引：0
|
作者：
Arrag, Sliman [1 ]
Hamdoun, Abdellatif [1 ]
Tragha, Abderrahim [2 ]
Khamlich, Salaheddine [1 ]
机构：
[1] Department of Electronics and treatment of information, Universite Hassan II Mohammedia, Casablanca, Morocco
[2] Department of computing and Mathematics, Universite Hassan II Mohammedia, Casablanca, Morocco
来源：
International Journal of Computer Science Issues | 2012年 / 9卷 / 5 5-3期
关键词：
Altera cyclones - Double AES - Encryption algorithms - Key expansion - On the flies - Triple AES; AESx; AES-exe - VHDL language;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：135 / 141
相关论文
共 50 条
  • [41] EFFICIENT IMPLEMENTATION OF AES ALGORITHM ON FPGA
    Deshpande, Hrushikesh S.
    Karande, Kailash J.
    Mulani, Altaaf O.
    2014 INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND SIGNAL PROCESSING (ICCSP), 2014,
  • [42] AES on FPGA from the fastest to the smallest
    Good, T
    Benaissa, M
    CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2005, PROCEEDINGS, 2005, 3659 : 427 - 440
  • [43] Hardware evolution of AES algorithm on FPGA
    Manjith, B. C.
    2019 INNOVATIONS IN POWER AND ADVANCED COMPUTING TECHNOLOGIES (I-PACT), 2019,
  • [44] Power equalization of AES FPGA implementation
    Strachacki, M.
    Szczepanski, S.
    BULLETIN OF THE POLISH ACADEMY OF SCIENCES-TECHNICAL SCIENCES, 2010, 58 (01) : 125 - 128
  • [45] AES算法的FPGA实现
    储奕锋
    电脑知识与技术(学术交流), 2007, (19) : 191 - 193
  • [46] The diversity study of AES on FPGA application
    Jing, MH
    Hsu, CH
    Truong, TK
    Chen, YH
    Chang, YT
    2002 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), PROCEEDINGS, 2002, : 390 - 393
  • [47] 基于VHDL语言实现FPGA设计
    田源
    火控雷达技术, 2004, (01) : 58 - 60
  • [48] Learning VHDL through teamwork FPGA game design
    Jesus Jimenez-Fernandez, Carlos
    Baena Oliva, Carmen
    Parra Fernandez, Pilar
    Gallardo Soto, Alejandro
    Potestad Ordonez, Francisco Eugenio
    Valencia Barrero, Manuel
    2020 XIV TECHNOLOGIES APPLIED TO ELECTRONICS TEACHING CONFERENCE (TAEE2020), 2020,
  • [49] 针对FPGA的VHDL优化设计探讨
    徐任晖
    吴连才
    张剑峰
    军事通信技术, 2002, 23 (04) : 57 - 59+62
  • [50] PCI-bus IP in VHDL for ORCA FPGA
    不详
    ELECTRONIC ENGINEERING, 1996, 68 (838): : 14 - 14
12345