Formal verification of emergent properties

被引:0
|
作者
Boumaza K. [1 ,2 ]
Tolba C. [2 ]
Ober I. [3 ]
机构
[1] LISCO: Laboratory of Complex Systems Engineering, Computer Science Department, Badji Mokhtar University, B.P. 12, Annaba
[2] Computer Science Department, Badji Mokhtar University, B.P. 12, Annaba
[3] ISAE-Supaero, University of Toulouse
来源
Informatica (Slovenia) | 2021年 / 45卷 / 03期
关键词
Boids; Emergence; Formal verification; Game of life; Model checking; Refinement;
D O I
10.31449/INF.V45I3.3160
中图分类号
学科分类号
摘要
Complex systems and systems of systems (SoS) are systems characterized by the interconnection of a large number of components or sub-systems. The complexity of such systems increases with the number of components and their manner of connectivity. The global behaviour of complex systems and SoS exhibits some properties that cannot be predicted by analysing components or sub-systems in isolation. The verification of these properties called “emergent properties" is considered a crucial issue when engineering such systems. The purpose of this paper is to give an overview and verify emergent properties. In a first step, we have taken the blinker and the traffic light of the game of life as examples to verify emergence by using refinement techniques; in a second step, since the refinement is not straightforward, we have taken another example, the Boids model, and by using timed automata and UPPAAL model checking techniques, we have been able to simulate and verify emergent properties. © 2021 Slovene Society Informatika. All rights reserved.
引用
收藏
页码:463 / 475
页数:12
相关论文
共 50 条
  • [31] Formal modeling and verification of systems with self-x properties
    Guedemann, Matthias
    Ortmeier, Frank
    Reif, Wolfgang
    AUTONOMIC AND TRUSTED COMPUTING, PROCEEDINGS, 2006, 4158 : 38 - 47
  • [32] Directed Automated Symbolic Verification Of Formal Properties With Local Variables
    Das, Sourasis
    Dasgupta, Pallab
    Banerjee, Ansuman
    Das, Partha Pratim
    TENCON 2009 - 2009 IEEE REGION 10 CONFERENCE, VOLS 1-4, 2009, : 2343 - +
  • [33] Proving completeness of properties in formal verification of Counting Heads for railways
    Kinder, Sebastian
    Drechsler, Rolf
    DSD 2007: 10TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN ARCHITECTURES, METHODS AND TOOLS, PROCEEDINGS, 2007, : 396 - 403
  • [34] Formal verification of protocol properties of sequential Java']Java programs
    Jin, Ying
    COMPSAC 2007: THE THIRTY-FIRST ANNUAL INTERNATIONAL COMPUTER SOFTWARE AND APPLICATIONS CONFERENCE, VOL I, PROCEEDINGS, 2007, : 475 - 482
  • [35] VERIFICATION - FORMAL OR OTHERWISE
    NEALE, RG
    ELECTRONIC ENGINEERING, 1994, 66 (811): : 5 - 5
  • [36] Formal Verification of Websites
    Flores, Sonia
    Lucas, Salvador
    Villanueva, Alicia
    ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE, 2008, 200 (03) : 103 - 118
  • [37] Formal Verification of a Keystore
    Boender, Jaap
    Badevic, Goran
    THEORETICAL ASPECTS OF SOFTWARE ENGINEERING, TASE 2022, 2022, 13299 : 49 - 64
  • [38] Formal verification at Intel
    Harrison, J
    18TH ANNUAL IEEE SYMPOSIUM ON LOGIC IN COMPUTER SCIENCE, PROCEEDINGS, 2003, : 45 - 54
  • [39] Formal verification of μ-charts
    Goldson, D
    APSEC 2002: NINTH ASIA PACIFIC SOFTWARE ENGINEERING CONFERENCE, 2002, : 129 - 136
  • [40] Formal verification of synchronizers
    Kapschitz, T
    Ginosar, R
    CORRECT HARDWARE DESIGN AND VERIFICATION METHODS, PROCEEDINGS, 2005, 3725 : 359 - 362