Estimation of maximum simultaneous switching noise for ground interconnection networks in CMOS systems

被引：0
|
作者：
Baek, J.-H. [1 ]
Kim, S.-Y. [1 ]
机构：
[1] School of Computing, Soongsil University, Seoul, Korea, Republic of
来源：
IEICE Transactions on Electronics | 2001年 / E84-C卷 / 03期
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
8
引用
收藏
页码：376 / 381
相关论文
共 50 条
  • [21] Simultaneous channel and symbol maximum likelihood estimation in Laplacian noise
    Univ of Karlskrona/Ronneby, Ronneby, Sweden
    Int Conf Signal Process Proc, (81-84):
  • [22] Modeling of simultaneous switching noise in high speed systems
    Chun, S
    Swaminathan, M
    Smith, LD
    Srinivasan, J
    Jin, Z
    Iyer, MK
    IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2001, 24 (02): : 132 - 142
  • [23] Modeling of simultaneous switching ground noise for gallium arsenide DCFL drivers
    Seeker, DA
    Prince, JL
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING - IEEE 5TH TOPICAL MEETING, 1996, : 125 - 128
  • [24] REDUCTION OF SIMULTANEOUS-SWITCHING NOISE IN LARGE CROSSBAR NETWORKS
    GHOSH, J
    VARMA, A
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1991, 38 (01): : 86 - 99
  • [25] Simultaneous switching noise reduction by resonant clock distribution networks
    Mesgarzadeh, Behzad
    INTEGRATION-THE VLSI JOURNAL, 2014, 47 (02) : 242 - 249
  • [26] Estimation of Simultaneous Switching Noise From Frequency-Domain Impedance Response of Resonant Power Distribution Networks
    Kim, Woopoung
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2011, 1 (09): : 1359 - 1367
  • [27] Mid-frequency simultaneous switching noise in computer systems
    Becker, W
    Smith, H
    McNamara, T
    Muench, P
    Eckhardt, J
    McAllister, M
    Katopis, G
    Richter, S
    Frech, R
    Klink, E
    47TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 1997 PROCEEDINGS, 1997, : 676 - 681
  • [28] Simultaneous Switching Noise Model by Distributed Power Port and Ground Current Capture
    Hwang, Seunghyun
    Chung, Daehyun
    Satagopan, Venkat
    Sudhakaran, Sunil
    Lin, Daniel
    Moghadam, Fathi
    2013 IEEE 63RD ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2013, : 1076 - 1080
  • [29] A simultaneous switching noise design algorithm for leadframe packages with or without ground plane
    Huang, C
    Yang, YC
    Prince, JL
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY PART B-ADVANCED PACKAGING, 1996, 19 (01): : 15 - 22
  • [30] An Analysis of the Timing Behavior of CMOS Digital Blocks under Simultaneous Switching Noise Conditions
    Azais, F.
    Bertrand, Y.
    Renovell, M.
    PROCEEDINGS OF THE 2009 IEEE SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, 2009, : 158 - 163
12345