Integrated circuit for single channel neural signal regeneration

Based on the 4-channel neural signal regeneration system which is realized by using discrete devices and successfully used for in-vivo experiments on rats and rabbits, a single channel neural signal regeneration integrated circuit (IC) is designed and realized in CSMC's 0.6m CMOS (complementary metal-oxide-semiconductor transistor) technology. The IC consists of a neural signal detection circuit with an adjustable gain, a buffer, and a function electrical stimulation (FES) circuit. The neural signal regenerating IC occupies a die area of 1.42 mm × 1.34 mm. Under a dual supply voltage of ±2.5 V, the DC power consumption is less than 10 mW. The on-wafer measurement results are as follows: The output resistor is 118 m, the 3 dB bandwidth is greater than 30 kHz, and the gain can be variable from 50 to 90 dB. The circuit is used for in-vivo experiments on the rat's sciatic nerve as well as on the spinal cord with the cuff type electrode array and the twin-needle electrode. The neural signal is successfully regenerated both on a rat's sciatic nerve bundle and on the spinal cord.