SiC MOSFET Gate Driver Design Based on Interference Dynamic Response Mechanism

被引：0
|
作者：
Shao T. [1 ]
Zheng T.Q. [1 ]
Li Z. [2 ]
Li H. [1 ]
Liu J. [1 ]
机构：
[1] School of Electrical Engineering, Beijing Jiaotong University, Beijing
[2] Global Power Technology Co. Ltd, Beijing
来源：
Diangong Jishu Xuebao/Transactions of China Electrotechnical Society | 2021年 / 36卷 / 20期
关键词：
Dynamic response; Gate driver design; Gate-source voltage interference; SiC MOSFET;
D O I：
10.19595/j.cnki.1000-6753.tces.210260
中图分类号：
学科分类号：
摘要：
Currently, the gate driver design method of SiC MOSFET is mostly inherited from the Si MOSFET and IGBT. However, since SiC MOSFETs have higher switching speed than Si devices, it is also worth exploring the gate-source voltage interference caused by gate internal resistance, gate driver inductance and power circuit inductance. In this paper, the process of gate-source voltage interference is analyzed, and then the method of driver parameter per-united design based on interference dynamic response mechanism is summarized and extracted. This paper deduces the transfer functions of the power loop and the driver loop according to the equivalent circuit of the junction capacitance. Then, the interference dynamic response mechanism is revealed. Furthermore, a per-united parameter expression form is introduced to quantify the influence of gate driver parameters on the interference conduction path of gate-source voltage. The SiC MOSFET gate driver design principle is proposed based on the interference dynamic response mechanism. Finally, a double-pulse experimental platform was built to verify the rationality of the driver design principle. © 2021, Electrical Technology Press Co. Ltd. All right reserved.
引用
收藏
页码：4204 / 4214
页数：10
相关论文
共 28 条
  • [21] Peters Dethard, Aichinger Thomas, Basler Thomas, Et al., Investigation of threshold voltage stability of SiC MOSFETs, 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 13-17, (2018)
  • [22] Guidelines for CoolSiC™ MOSFET gate drive voltage window
  • [23] Si C, Li Xiaoling, Zeng Zheng, Chen Hao, Et al., Comparative package evaluation and failure mode analysis of SiC, Si, and hybrid power modules, Proceedings of the CSEE, 38, 16, pp. 4823-4835, (2018)
  • [24] Zhang Zheyu, Zhang Weimin, Wang Fred, Et al., Analysis of the switching speed limitation of wide band-gap devices in a phase-leg configuration, 2012 IEEE Energy Conversion Congress and Exposition (ECCE), pp. 15-20, (2012)
  • [25] Ji Shiqi, Zheng Sheng, Wang Fei, Et al., Temperature-dependent characterization, modeling, and switching speed-limitation analysis of third-generation 10kV SiC MOSFET, IEEE Transactions on Power Electronics, 33, 5, pp. 4317-4327, (2018)
  • [26] Xie Ruiliang, Wang Hanxing, Tang Gaofei, Et al., An analytical model for false turn-on evaluation of high-voltage enhancement-mode GaN transistor in bridge-leg configuration, IEEE Transactions on Power Electronics, 32, 8, pp. 6416-6433, (2017)
  • [27] Zhu Tianhua, Zhuo Fang, Zhao Fangzhou, Et al., Quantitative model-based false turn-on evaluation and suppression for cascode GaN devices in half-bridge applications, IEEE Transactions on Power Electronics, 34, 10, pp. 10166-10179, (2019)
  • [28] (2006)
123