VLSI architecture for H.264 integer-pel motion estimation with minimum memory bandwidth requirement

被引：0
|
作者：
Li, Dong-Xiao [1 ]
Zheng, Wei [1 ]
Zhang, Ming [1 ]
机构：
[1] Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China
来源：
Zhejiang Daxue Xuebao (Gongxue Ban)/Journal of Zhejiang University (Engineering Science) | 2007年 / 41卷 / 08期
关键词：
12;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：1341 / 1347
相关论文
共 50 条
  • [21] A quarter pel full search block motion estimation architecture for H.264/AVC
    Rahman, CA
    Badawy, W
    2005 IEEE International Conference on Multimedia and Expo (ICME), Vols 1 and 2, 2005, : 414 - 417
  • [22] A Dynamically Reconfigurable VLSI Architecture for H.264 Integer Transforms
    Hong Qi
    Cao Wei
    Tong Jiarong
    CHINESE JOURNAL OF ELECTRONICS, 2012, 21 (03): : 510 - 514
  • [23] An efficient VLSI architecture for H.264 variable block size motion estimation
    Ou, CM
    Le, CF
    Hwang, WJ
    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 2005, 51 (04) : 1291 - 1299
  • [24] High performance VLSI architecture of fractional motion estimation in H.264 for HDTV
    Yang, Changqi
    Goto, Satoshi
    Ikenaga, Takeshi
    2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 2605 - +
  • [25] Integer-pixel motion estimation H.264/AVC accelerator architecture with optimal memory management
    Campos, Armando Mora
    Merelo, Francisco J. Ballester
    Peiro, Marcos A. Martinez
    Esteve, Jose A. Canals
    MICROPROCESSORS AND MICROSYSTEMS, 2008, 32 (02) : 68 - 78
  • [26] Architecture design of low power integer motion estimation for H.264/AVC
    Chen, Tung-Chien
    Chen, Yu-Han
    Tsai, Sung-Fang
    Chen, Liang-Gee
    2006 IEEE International Conference on Acoustics, Speech and Signal Processing, Vols 1-13, 2006, : 3351 - 3354
  • [27] A VLSI architecture for variable block size motion estimation in H.264/AVC with low cost memory organization
    Song, Yang
    Liu, Zhenyu
    Ikenaga, Takeshi
    Goto, Satoshi
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2006, E89A (12) : 3594 - 3601
  • [28] VLSI architecture for variable block size motion estimation in H.264/AVC with low cost memory organization
    Song, Yang
    Liu, Zhenyu
    Ikenaga, Takeshi
    Goto, Satoshi
    2006 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PAPERS, 2006, : 89 - +
  • [29] VLSI Implementation of Fast Integer-Pixel Motion Estimation Algorithm Based on H.264
    Song, Yu-kun
    Chen, Xiao-bo
    Du, Gao-ming
    INTERNATIONAL CONFERENCE ON COMPUTER, NETWORK SECURITY AND COMMUNICATION ENGINEERING (CNSCE 2014), 2014, : 150 - 154
  • [30] A Complete H.264 Motion Estimation Architecture
    Siqueira, Hadley
    Lopes, Alba
    Marinho, Victor
    Correa, Edgard
    2012 BRAZILIAN SYMPOSIUM ON COMPUTING SYSTEM ENGINEERING (SBESC 2012), 2012, : 111 - 114
12345