Phase Error Features of Grid-tied Inverter Based on Power Synchronization Control

被引:0
|
作者
Hou C. [1 ]
Liu A. [2 ]
Zhu M. [1 ]
Wu Z. [3 ]
机构
[1] Key Lab of Control of Power Transmission and Conversion, Ministry of Education, Shanghai Jiao Tong University, Minhang District, Shanghai
[2] College of Smart Energy, Shanghai Jiao Tong University, Minhang District, Shanghai
[3] Suzhou Power Supply Company, State Grid Jiangsu Electric Power Company, Jiangsu Province, Suzhou
关键词
inverter; phase error; phase-locked loop (PLL); power synchronization control;
D O I
10.13334/j.0258-8013.pcsee.230001
中图分类号
学科分类号
摘要
In the grid-connected inverter, the grid synchronization mechanism represented by phase-locked loop (PLL) is widely used. However, the introduction of PLL has a potential to degrade the system stability. Because of this phenomenon, the control strategy without PLL including power synchronization control (PSC) has received significant attention. When it comes to the synchronization characteristic of PSC, the existing research lacks phase error model under the condition of perturbation. And the discrepancy between the synchronization characteristic of PSC and PLL has not been clarified. In order to solve this problem, this paper derives the phase error model of PSC under the condition of perturbation and conducts a theoretical analysis of the impact that control parameters exert on the PSC phase error. Based on the built model, the difference of phase error between PSC and traditional PLL is compared under the same bandwidth. The simulation and experiment results prove the correctness of PSC phase error model and show that under the same bandwidth, the synchronization of PSC is superior to PLL. The results of this paper provide reference for the parameter design and synchronization analysis of PSC loop. ©2024 Chin.Soc.for Elec.Eng.
引用
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页码:1962 / 1973
页数:11
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