An Improved Distributed Multiplier-Less Approach for Radix-2 FFT

被引：3
|
作者：
Bowlyn, Kevin [1 ]
Hounsinou, Sena [2 ]
机构：
[1] Bowlyn, Kevin
[2] Hounsinou, Sena
来源：
Bowlyn, Kevin (bowlynk@sacredheart.edu) | 1600年 / Institute of Electrical and Electronics Engineers Inc.卷 / 03期
关键词：
Fast Fourier transforms;
D O I：
10.1109/LOCS.2020.3014354
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：54 / 57
相关论文
共 50 条
  • [41] Static quantised radix-2 fast Fourier transform (FFT)/inverse FFT processor for constraints analysis
    Teymourzadeh, Rozita
    Abigo, Memtode Jim
    Hoong, Mok Vee
    INTERNATIONAL JOURNAL OF ELECTRONICS, 2014, 101 (02) : 231 - 240
  • [42] Area and Frequency optimized 1024 point Radix-2 FFT Processor on FPGA
    Kumar, Vinay M.
    Selvakumar, David A.
    Sobha, P. M.
    2015 INTERNATIONAL CONFERENCE ON VLSI SYSTEMS, ARCHITECTURE, TECHNOLOGY AND APPLICATIONS (VLSI-SATA), 2015,
  • [43] New radix-2 to the 4th power pipeline FFT processor
    Oh, JY
    Lim, MS
    IEICE TRANSACTIONS ON ELECTRONICS, 2005, E88C (08): : 1740 - 1746
  • [44] An Efficient FPGA Architecture for Reconfigurable FFT Processor Incorporating an Integration of an Improved CORDIC and Radix-2(R) Algorithm
    Kavitha, M. S.
    Rangarajan, P.
    CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2020, 39 (11) : 5801 - 5829
  • [45] Low-Power Split-Radix FFT Processors Using Radix-2 Butterfly Units
    Qian, Zhuo
    Margala, Martin
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (09) : 3008 - 3012
  • [46] An FPGA implementation and performance analysis between Radix-2 and Radix-4 of 4096 point FFT
    Abbas, Zaid Ali
    Sulaiman, Nasri B.
    Yunus, Nurul Amziah Md
    Hasan, Wan Zuha Wan
    Ahmed, Mohammed K.
    2018 IEEE 5TH INTERNATIONAL CONFERENCE ON SMART INSTRUMENTATION, MEASUREMENT AND APPLICATION (ICSIMA), 2018,
  • [47] Error Analysis and Efficient Realization of the Multiplier-Less FFT-Like Transformation (ML-FFT) and Related Sinusoidal Transformations
    K. M. Tsui
    S. C. Chan
    Journal of VLSI signal processing systems for signal, image and video technology, 2006, 44 : 97 - 115
  • [48] Twiddle Factor Complexity Analysis of Radix-2 FFT Algorithms for Pipelined Architectures
    Qureshi, Fahad
    Takala, Jarmo
    2017 FIFTY-FIRST ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS, AND COMPUTERS, 2017, : 1034 - 1037
  • [49] Memory-efficient Radix-2 FFT Processor using CORDIC Algorithm
    Bansal, Puneet
    Dhaliwal, B. S.
    Gill, S. S.
    2014 INTERNATIONAL CONFERENCE ON GREEN COMPUTING COMMUNICATION AND ELECTRICAL ENGINEERING (ICGCCEE), 2014,
  • [50] FPGA implementation of a canonical signed digit multiplier-less based FFT processor for wireless communication applications
    Benhamid, Mahinud
    Othman, Masuri
    2006 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS, 2006, : 641 - +
12345