An Ultra-Low Power CMOS Subthreshold Voltage Reference with Temperature Coefficient Compensation

This paper presents a nanowatt voltage reference (VR) with an ultralow power consumption temperature coefficient compensation. All transistors are biased in the subthreshold region to reduce the power consumption of the proposed VR circuit. The complementary-to-absolute-temperature (CTAT) voltage and proportional-to-absolute-temperature (PTAT) voltage are mainly generated by two NMOS transistors with different threshold voltages. At the same time, a simple temperature compensation circuit is designed to optimize the temperature coefficient at high temperatures, so that the circuit can generate a reference voltage with a wider temperature range and a lower temperature coefficient. The proposed VR circuit is fabricated in a 0.18-mu m CMOS process with a silicon area of only 0.022 mm(2). Theoretical analysis and post-layout simulation results verified the reliability and performance improvement of circuit operation. The proposed VR circuit generates a reference voltage of 308.21 mV with a temperature coefficient of 6.42 ppm/degrees C over a wide temperature range of -40 similar to 40 degrees C. The power consumption of the circuit is 7.04 nW. The voltage line sensitivity (LS) is 0.099%/V.