A Low-Complexity Soft-Output Massive MIMO Detector With Near-Optimum Performance

被引:0
|
作者
Hu, Jinjie [1 ]
Song, Suwen [1 ,2 ]
Wang, Zhongfeng [1 ]
机构
[1] Nanjing Univ, Sch Elect Sci & Engn, Nanjing 210023, Peoples R China
[2] Sun Yat Sen Univ, Sch Integrated Circuits, Shenzhen 518107, Peoples R China
基金
中国国家自然科学基金;
关键词
Detectors; Complexity theory; Massive MIMO; Vectors; Modulation; Antennas; Hardware; modulation-based successive gradient descent; coordinate descent; likelihood ascend; VLSI; soft-output detector; SYSTEMS; DESIGN;
D O I
10.1109/TCSI.2024.3435361
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In massive multiple-input multiple-output (MIMO) detection, the likelihood ascent search (LAS) algorithm is well-known for its near-optimum performance and low complexity. It employs gradient descent to enhance the performance of suboptimal MIMO detectors, specifically the minimum mean-square error (MMSE) algorithm. In this paper, we introduce several techniques to improve the MMSE-based LAS (MMSE-LAS) algorithm in terms of both complexity and performance. To reduce complexity, the MMSE is first replaced with the low-complexity optimized coordinate descent (OCD) algorithm at the cost of negligible performance loss. Then, the conventional OCD and LAS algorithms are optimized for better computation reuse. Besides, we derive a new soft-output computation formula for LAS to improve the coded performance. The proposed modulation-based successive gradient descent (MB-SGD) detector outperforms MMSE-LAS and the latest work in terms of either complexity or performance for $64\times 8$ and $128\times 8$ LDPC-coded MIMO systems with multiple modulations from QPSK to 256-QAM. The corresponding architecture for a $128\times 8$ coded MIMO system supporting multiple modulations is implemented on a Xilinx Virtex-7 FPGA and with TSMC 28-nm CMOS technology, exhibiting 74.5% lower latency and 0.24 dB gain compared to OCD on FPGA, and also achieving 14.59 $\times$ energy efficiency and 2.04 $\times$ area efficiency over the state-of-the-art implementation on ASIC.
引用
收藏
页码:5445 / 5456
页数:12
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