Systematic Modeling and Optimization for High-Efficiency Interdigitated Back-Contact Crystalline Silicon Solar Cells

被引:1
|
作者
Khokhar, Muhammad Quddamah [1 ]
Yousuf, Hasnain [2 ]
Alamgeer, Mengmeng [2 ]
Chu, Mengmeng [2 ]
Rahman, Rafi Ur [1 ]
Jony, Jaljalalul Abedin [2 ]
Hussain, Shahzada Qamar [3 ,4 ]
Pham, Duy Phong [1 ]
Yi, Junsin [5 ]
机构
[1] Sungkyunkwan Univ, Dept Elect & Comp Engn, Suwon 16419, South Korea
[2] Sungkyunkwan Univ, Interdisciplinary Program Photovolta Syst Engn, Suwon 16419, South Korea
[3] RMIT Univ, STEM Sch Engn, 124 La Trobe St, Melbourne, Vic 3000, Australia
[4] COMSATS Univ Islamabad, Dept Phys, Lahore Campus, Lahore 54000, Pakistan
[5] Sungkyunkwan Univ, Coll Informat & Commun Engn, Gyeonggi Do 16419, South Korea
关键词
crystalline silicon; IBC solar cell; Quokka3; simulations; surface passivation; WORK FUNCTION; SIMULATION; LAYER;
D O I
10.1002/ente.202400831
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
This study utilizes Quokka3, an advanced solar cell simulation program, specifically tailored for interdigitated back-contact (IBC) crystalline silicon (c-Si) solar cells. Through meticulous Quokka3 simulations, the influence of several geometric and wafer characteristics of the solar cell backside on current-voltage (I-V) performance has been scientifically explored for IBC c-Si solar cells. The investigation encompasses parameters such as wafer thickness, bulk lifetime, resistivity, emitter and back surface field area fraction, and front- and rear-surface passivation. Optimal values for these parameters have been proposed to enhance the efficiency of IBC solar cells. These recommendations contain an emitter percentage of 70%, a wafer thickness ranging from 200 mu m, a wafer resistivity of 1 Omega cm, and a wafer bulk lifetime of at least 10 ms. Moreover, under conditions where the cell is not short-circuited, the potential for achieving higher cell efficiency, up to 26.64%, has been shown. This study uses Quokka3 to simulate interdigitated back-contact (IBC) c-Si solar cells, examining the impact of geometric and wafer characteristics. Optimal parameters include a 70% emitter percentage, 200 mu m thickness, 1 Omega cm resistivity, and 10 ms bulk lifetime. These optimizations achieve up to 26.64% efficiency, significantly enhancing performance, with open-circuit voltage (Voc) = 737.9 mV, short-circuit current (Jsc) = 42.06 mA cm-2, and Fill Factor (FF) = 85.85%.image (c) 2024 WILEY-VCH GmbH
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页数:8
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