Hardware Circuits and Systems Design for Post-Quantum Cryptography-A Tutorial Brief

被引:6
|
作者
Xie, Jiafeng [1 ]
Zhao, Wenfeng [2 ]
Lee, Hanho [3 ]
Roy, Debapriya Basu [4 ]
Zhang, Xinmiao [5 ]
机构
[1] Villanova Univ, Dept Elect & Comp Engn, Villanova, PA 19085 USA
[2] Binghamton Univ, Elect & Comp Engn Dept, Binghamton, NY 13902 USA
[3] Inha Univ, Dept Elect & Comp Engn, Incheon 22212, South Korea
[4] Indian Inst Technol Kharagpur, Dept Comp Sci & Engn, Kanpur 208016, India
[5] Ohio State Univ, Dept Elect & Comp Engn, Columbus, OH 43210 USA
关键词
Hardware; NIST; Circuits and systems; Tutorials; Computers; Arithmetic; Standards; Arithmetic operation; hardware cryptographic design for PQC; circuits and systems design techniques; RING-LWE; POLYNOMIAL MULTIPLICATION; MODULAR MULTIPLICATION; IMPLEMENTATION; EFFICIENT; ARCHITECTURES; ALGORITHMS; REDUCTION;
D O I
10.1109/TCSII.2024.3357836
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Due to the increasing threats from possible large-scale quantum computers, post-quantum cryptography (PQC) has drawn significant attention from various communities recently. In particular, along with the National Institute of Standards and Technology (NIST) PQC standardization process, more works have gradually switched to the PQC hardware implementations. Following this trend, this tutorial brief, led by a group of experts in the field, aims to deliver a comprehensive tutorial on hardware circuits and systems design for PQC. After introducing primary arithmetic operations and algorithmic features of different PQC, we introduced related PQC hardware circuits and systems design techniques (from component to system levels). Future research and directions are also provided. This tutorial will provide useful information for the TCAS-II community and the broader Circuits and Systems Society.
引用
收藏
页码:1670 / 1676
页数:7
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