A Wire-less SiC Power Module Using Flip-Chip Sintering Method

被引:0
|
作者
Liu, Yuncan [1 ]
Yan, Haidong [2 ]
Yang, Daoguo [1 ]
Li, Wangyun [1 ]
Liu, Chaohui [3 ]
Zhang, Yakun [3 ]
机构
[1] Guilin Univ Elect Technol, Sch Mech & Elect Engn, Guangxi Key Lab Mfg Syst & Adv Mfg, Guilin, Peoples R China
[2] Zhejiang Univ, Coll Elect Engn, Hangzhou, Peoples R China
[3] Natl New Energy Vehicle Technol Innovat Ctr NEVC, Powertrain Dept, Beijing, Peoples R China
基金
中国国家自然科学基金;
关键词
Flip chip; Double-sided cooling; SiC MOSFET; Ag sintering; Thermomechanical coupling;
D O I
10.1109/ICEPT59018.2023.10492257
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
As SiC devices move towards lower specific RDS(on) and higher current density, traditional wire bonding SiC power modules are facing serious challenges in thermal management. The top-side of the SiC device of the double-sided cooling (DSC) power module uses a metal surface interconnection instead of the bonding wire point interconnection of the single-sided cooling (SSC) power module, which can effectively improve the current carrying capacity of the devices and significantly reduce the device junction temperature. However, the fragile interconnection structure on the top-side of the SiC devices of the DSC power modules will endure high thermomechanical stress from the upper largearea substrate, leading to significant thermal-mechanical reliability concerns. This paper proposes a flip-chip sintering interconnection method for DSC power modules which strengthens the mechanical interconnection structure between the top-side of the SiC device and the upper substrate. Simultaneously, it further improves the double-sided heat dissipation efficiency and current carrying capacity of the SiC device. Compared with the traditional DSC power modules, the maximum junction temperature of the SiC device of the flip-chip double-sided cooling (FCDSC) power modules is reduced by 14.2%, the effective interconnection area is increased by 60.5%, the maximum thermomechanical stress of the SiC device is reduced by 11.0%, and the maximum current carrying capacity is increased by 5.5%.
引用
收藏
页数:6
相关论文
共 50 条
  • [1] High Reliability Wire-Less Power Module Structure
    Chi, Wei-Hao
    Chen, Hao-Chih
    Liao, Hsueh-Kuo
    2018 13TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT), 2018, : 71 - 74
  • [2] LTCC module using flip-chip technology for mobile equipment
    Hirota, J
    Funaki, T
    Miwa, A
    2001 INTERNATIONAL SYMPOSIUM ON MICROELECTRONICS, PROCEEDINGS, 2001, 4587 : 283 - 286
  • [3] Flip-Chip Low inductive and EMC optimized PCB Power Module
    Abed Ali, Fatme
    Jeannin, Pierre-Olivier
    Avenas, Yvan
    Lefranc, Pierre
    2024 IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, APEC, 2024, : 1534 - 1538
  • [4] Flip-chip power distribution
    Lipa, S
    Schaffer, JT
    Glaser, AW
    Franzon, PD
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 1998, : 39 - 41
  • [5] Aspects of Applying Flip-Chip Technology for SiC Power Devices Assembly
    Mysliwiec, Marcin
    Guziewicz, Marek
    Kisiel, Ryszard
    2013 PROCEEDINGS OF THE 36TH INTERNATIONAL SPRING SEMINAR ON ELECTRONICS TECHNOLOGY (ISSE), 2013, : 90 - 93
  • [6] Thermal transient measurement and modelling of a power cycled flip-chip LED module
    Mitterhuber, Lisa
    Defregger, Stefan
    Magnien, Julien
    Ros, Joerdis
    Hammer, Rene
    Goullon, Lena
    Hutter, Matthias
    Schrank, Franz
    Hoerth, Stefan
    Kraker, Elke
    MICROELECTRONICS RELIABILITY, 2018, 81 : 373 - 380
  • [7] Comparing of flip-chip and wire-bonding interconnection
    Novotny, Marek
    Jakubka, Lubos
    Szendiuch, Ivan
    2006 29TH INTERNATIONAL SPRING SEMINAR ON ELECTRONICS TECHNOLOGY, 2006, : 295 - +
  • [8] Packaging test chip for flip-chip and wire bonding process characterization
    Schwizer, J
    Song, WH
    Mayer, M
    Brand, O
    Baltes, H
    BOSTON TRANSDUCERS'03: DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2, 2003, : 440 - 443
  • [9] Parameter driven monitoring for a flip-chip LED module under power cycling condition
    Magnien, J.
    Mitterhuber, L.
    Rosc, J.
    Schrank, F.
    Hoerth, S.
    Hutter, M.
    Defregger, S.
    Kraker, E.
    MICROELECTRONICS RELIABILITY, 2018, 82 : 84 - 89
  • [10] Development of 4-GHz flip-chip VCO module
    Stadius, K
    Halonen, K
    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 2687 - 2690