Intelligent adjustable-speed drive on an FPGA

被引:0
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作者
Benzekri A. [1 ]
机构
[1] Signals and Systems Laboratory, Institute of Electrical and Electronic Engineering, University M'Hamed Bougara, Boumerdes
关键词
adjustable-speed drive; armature-controlled; field programmable gate array; FPGA; hardware/software co-design; Nios®; II; PI-like fuzzy controller; PWM; Quartus II; SoPC; system-on-programmable-chip; VHDL;
D O I
10.1504/IJPELEC.2022.10037671
中图分类号
学科分类号
摘要
This paper addresses the design, simulation and implementation of a PI-like fuzzy controller to adjust the velocity of an armature-controlled DC motor using hardware/software co-design. Fuzzy control and digital pulse width modulation (PWM) techniques are used as computational solution, while the implementation is carried on a reconfigurable hardware platform. This controller is designed with four considerations in mind: design integration, robustness, reduced complexity and flexibility. Computationally intensive tasks are implemented as hardware accelerators using VHDL, data flow and control are implemented in software using system-on-programmable-chip (SoPC) approach. With this paradigm, we get the robustness of fuzzy control, the best of software programmability of Nios®-II and the hardware reconfigurability of the FPGA. The model was synthesised using Quartus®II and targeted at a Cyclone-II FPGA. Computer simulation results show the effectiveness and merit of this process. The real-time applicability of this controller is exemplified on a motor provided with a tachogenerator mounted on its shaft. © 2022 Inderscience Enterprises Ltd.
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页码:180 / 200
页数:20
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