FULL-SWING BICMOS LOGIC-CIRCUITS WITH COMPLEMENTARY EMITTER-FOLLOWER DRIVER CONFIGURATION

Various full-swing BiCMOS logic circuits with complementary emitter-follower driver configuration are described. The performance of the circuits has been demonstrated in a 1.2-mu-m complementary BiCMOS technology with a 6-GHz n-p-n and a 2-GHz p-n-p transistor. For the basic circuit, gate delay (fan-in = 2, fan-out = 1) is 366 ps and driving capability is 288 ps/pF at 4 V. Delay-power trade-offs that depend on characteristics of the clamping diode between two base nodes of the complementary emitter-follower driver, parasitic capacitances at the two base nodes, and the technique used to achieve full swing have been identified for these circuits. These circuits show leverage over the conventional BiCMOS circuit for reduced power-supply voltages.