A Neural Net Associative Memory for Real-Time Applications

被引:3
|
作者
Heileman, Gregory L. [1 ]
Papadourakis, George M. [2 ]
Georgiopoulos, Michael [3 ]
机构
[1] Univ Cent Florida, Dept Comp Engn, Orlando, FL 32816 USA
[2] Univ Crete, Dept Comp Sci, Iraklion, Crete, Greece
[3] Univ Cent Florida, Dept Elect Engn, Orlando, FL 32816 USA
关键词
D O I
10.1162/neco.1990.2.1.107
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A parallel hardware implementation of the associative memory neural network introduced by Hopfield is described. The design utilizes the Geometric Arithmetic Parallel Processor (GAPP), a commercially available single-chip VLSI general-purpose array processor consisting of 72 processing elements. The ability to cascade these chips allows large arrays of processors to be easily constructed and used to implement the Hopfield network. The memory requirements and processing times of such arrays are analyzed based on the number of nodes in the network and the number of exemplar patterns. Compared with other digital implementations, this design yields significant improvements in runtime performance and offers the capability of using large neural network associative memories in real-time applications.
引用
收藏
页码:107 / 115
页数:9
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