THE MOTOROLA DSP56000 DIGITAL SIGNAL PROCESSOR

被引：8

作者：

KLOKER, KL ^{[1
]}

机构：

[1] MOTOROLA INC,SCHAUMBURG,IL 60196

来源：

IEEE MICRO | 1986年 / 6卷 / 06期

关键词：

COMPUTER ARCHITECTURE - COMPUTER SOFTWARE - COMPUTERS; MICROCOMPUTER - Computer Interfaces - SEMICONDUCTOR DEVICES; MOS; -; Applications;

D O I：

10.1109/MM.1986.304807

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A description is given of the Motorola DSP56000, a high-performance, user-programmable digital signal processor implemented in high-density, low-power CMOS technology. This first member of a new family of special-purpose microprocessors designed specifically for digital signal processing applications has a highly parallel architecture and can execute 10. 25 million instructions per second. Its instruction set supports the real-time processing of 24-bit data with 56 bits of internal arithmetic precision. The author discusses the digital signal processing environment, DSP56000 features and architecture, the data ALU, address SLU, program controller, multiple-bus architecture, instruction set, on-chip resources, implementation, software examples and performance analysis, and design tools.

引用

页码：29 / 48

页数：20

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