ON THE VLSI DESIGN OF A PIPELINE REED-SOLOMON DECODER USING SYSTOLIC ARRAYS

被引：64
|
作者：
SHAO, HM
REED, IS
机构：
[1] CALTECH,JET PROP LAB,PASADENA,CA 91109
[2] UNIV SO CALIF,DEPT ELECT ENGN,LOS ANGELES,CA 90089
来源：
IEEE TRANSACTIONS ON COMPUTERS | 1988年 / 37卷 / 10期
关键词：
D O I：
10.1109/12.5988
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
CODES, SYMBOLIC
引用
收藏
页码：1273 / 1280
页数：8
相关论文
共 50 条
  • [1] A VLSI DESIGN OF A PIPELINE REED-SOLOMON DECODER
    SHAO, HM
    TRUONG, TK
    DEUTSCH, LJ
    YUEN, JH
    REED, IS
    IEEE TRANSACTIONS ON COMPUTERS, 1985, 34 (05) : 393 - 403
  • [2] VLSI design of Reed-Solomon decoder architectures
    Lee, H
    Yu, ML
    Song, LL
    ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL V: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY, 2000, : 705 - 708
  • [3] A VLSI design for universal Reed-Solomon erasure decoder
    Xu, YS
    Zhang, TT
    2002 6TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS, VOLS I AND II, 2002, : 398 - 401
  • [4] VLSI Architecture for Reed-Solomon Decoder
    Kumar, A. T. Rajesh
    Rao, A. Sarveswara
    Kumar, Ratna K., V
    JOURNAL OF SPACECRAFT TECHNOLOGY, 2011, 21 (02): : 1 - 11
  • [5] A VLSI design of a high-speed Reed-Solomon decoder
    Lee, HH
    14TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2001, : 316 - 320
  • [6] A DESIGN OF REED-SOLOMON DECODER WITH SYSTOLIC-ARRAY STRUCTURE
    IWAMURA, K
    DOHI, Y
    IMAI, H
    IEEE TRANSACTIONS ON COMPUTERS, 1995, 44 (01) : 118 - 122
  • [7] A VLSI design of Reed-Solomon Decoder for IEEE 802.16d
    Shen, Qian
    Lin, Pin
    IC-BNMT 2007: Proceedings of 2007 International Conference on Broadband Network & Multimedia Technology, 2007, : 1 - 4
  • [8] A VLSI design of a pipelining and area-efficient Reed-solomon decoder
    Wang, Wei-min
    Bi, Du-yan
    Du, Xing-min
    Ma, Lin-hua
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2007, E90D (08) : 1301 - 1303
  • [9] Area-efficient VLSI design of Reed-Solomon decoder for HDTV
    Information Engineering School, Beijing University of Science and Technology, Beijing 100083, China
    Jisuanji Gongcheng, 2006, 16 (11-13+28):
  • [10] An efficient Reed-Solomon decoder VLSI with erasure correction
    Oh, K
    Sung, WY
    SIPS 97 - 1997 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION, 1997, : 193 - 201
12345