Through-Silicon-Via Filling Process Using Cu Electrodeposition

Intensive researches have been focused on the 3-dimensional packaging technology using through silicon via (TSV) to overcome the limitation in Cu interconnection scaling. Void-free filling of TSV by the Cu electrodeposition is required for the fabrication of reliable electronic devices. It is generally known that sufficient inhibition on the top and the sidewall of TSV, accompanying the selective Cu deposition on the bottom, enables the void-free bottom-up filling. Organic additives contained in the electrolyte locally determine the deposition rate of Cu inside the TSV. Investigation on the additive chemistry is essential for understanding the filling mechanisms of TSV based on the effects of additives in the Cu electrodeposition process. In this review, we introduce various filling mechanisms suggested by analyzing the additives effect, research on the three-additive system containing new levelers synthesized to increase efficiency of the filling process, and methods to improve the filling performance by modifying the functional groups of the additives or deposition mode.