ARCHITECTURES FOR MULTIPLIERLESS FAST FOURIER-TRANSFORM HARDWARE IMPLEMENTATION IN VLSI

被引：12

作者：

PERERA, WA ^{[1
]}

机构：

[1] UNIV CAMBRIDGE,DEPT ENGN,CAMBRIDGE,ENGLAND

来源：

IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING | 1987年 / 35卷 / 12期

关键词：

D O I：

10.1109/TASSP.1987.1165093

中图分类号：

O42 [声学];

学科分类号：

070206 ; 082403 ;

摘要：

引用

页码：1750 / 1760

页数：11

共 50 条

[31] ON THE DESIGN OF VLSI ARRAYS FOR DISCRETE FOURIER-TRANSFORM
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[40] MAKING FAST FOURIER-TRANSFORM REALLY FAST
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