MATHEMATICAL MORPHOLOGY APPLIED TO INTEGRATED-CIRCUIT INSPECTION

"Mathematical morphology" was introduced in the late 1960's as a new methodology for image analysis. Using this method, objects are represented as subsets of a predefined space, and are processed by means of set transformations. We define morphological transformation as the transformation of one set into another and the measurement of the new set. Set transformations are carried out using predefined sets known as "structuring elements". The fundamental morphological operations are erosion and dilation. The geometric nature of mathematical morphology can help us to analyze integrated circuit images that are characterized by important geometric constraints determined by design rules, such as the distance between layers, rectangular shapes, etc. We present a morphology-based method to extract design masks from integrated circuit images. A multispectral image from a small zone within the circuit is obtained by means of an optical microscope, and is then processed to segment and reconstruct different layers. The large number of images needed to represent an integrated circuit leads us to consider only rapid methods of image segmentation, depending upon the spectral distribution of each material. After the segmentation process, a map is obtained showing the distribution of each material on the surface of the circuit, but only for the visible zones of each layer. Several problems must be solved, such as layer fragmentation as a result of the presence of underlaying layers; the determination of invisible zones for each underlaying layer, etc. © 1990.