106-BIT NDRO PLATED-WIRE MEMORY

被引：0

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作者：

ISHI, O

TAKASHIMA, M

TOSAKA, K

NAKAMURA, K

NITTA, M

机构：

来源：

ELECTRONICS & COMMUNICATIONS IN JAPAN | 1972年 / 54卷 / 05期

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中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

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页码：104 / +

页数：1

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