SYSTOLIC ALGORITHMS FOR DIGITAL SIGNAL-PROCESSING

被引：0

作者：

CHARLIER, JP

VANBEGIN, M

VANDOOREN, P

机构：

[1] Philips Research Lab Brussels, Belgium

来源：

PHILIPS JOURNAL OF RESEARCH | 1988年 / 43卷 / 3-4期

关键词：

Computer Architecture - Computer Programming--Algorithms - Mathematical Techniques--Algorithms;

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

New developments in the interdisciplinary area of parallel algorithms for digital signal processing are considered. Our purpose is not to be exhaustive but to introduce the reader to the current developments in the area, and to guide him through the existing literature.

引用

页码：268 / 290

页数：23

共 50 条

[1] VLSI SYSTOLIC MULTIPLIER AND ADDER FOR DIGITAL SIGNAL-PROCESSING
LEE, SW
HSU, WS
SIGNAL PROCESSING, 1991, 23 (02) : 205 - 213
[2] VLSI SYSTOLIC ARRAY FOR SRIF DIGITAL SIGNAL-PROCESSING ALGORITHM
IWAMI, K
TANAKA, K
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1994, E77A (09) : 1475 - 1483
[3] DUAL SYSTOLIC ARCHITECTURES FOR VLSI DIGITAL SIGNAL-PROCESSING SYSTEMS
BRIDGES, GE
PRIES, W
MCLEOD, RD
YUNIK, M
GULAK, PG
CARD, HC
IEEE TRANSACTIONS ON COMPUTERS, 1986, 35 (10) : 916 - 923
[4] A SYSTOLIC PROCESSOR FOR SIGNAL-PROCESSING
FRANK, GA
GREENAWALT, EM
KULKARNI, AV
AFIPS CONFERENCE PROCEEDINGS, 1982, 51 : 225 - &
[5] DIGITAL SIGNAL-PROCESSING
BEST, R
TECHNISCHES MESSEN, 1989, 56 (03): : 130 - 137
[6] DIGITAL SIGNAL-PROCESSING
BEST, R
TECHNISCHES MESSEN, 1991, 58 (7-8): : 310 - 317
[7] DIGITAL SIGNAL-PROCESSING
BEST, R
TECHNISCHES MESSEN, 1992, 59 (02): : 76 - 81
[8] DIGITAL SIGNAL-PROCESSING
BEST, R
TECHNISCHES MESSEN, 1991, 58 (01): : 36 - 40
[9] DIGITAL SIGNAL-PROCESSING
BEST, R
TECHNISCHES MESSEN, 1992, 59 (01): : 26 - 32
[10] DIGITAL SIGNAL-PROCESSING
BEST, R
TECHNISCHES MESSEN, 1990, 57 (06): : 256 - 262

← 1 2 3 4 5 →