CMOS FAULT MODELING, TEST-GENERATION AND DESIGN FOR TESTABILITY

被引：1

作者：

MATTHAUS, C ^{[1
]}

KRUGERSPRENGEL, B ^{[1
]}

GLOWACZ, C ^{[1
]}

HUBNER, U ^{[1
]}

VIERHAUS, HT ^{[1
]}

机构：

[1] GESELL MATH & DATENVERARBEITUNG MBH,EIS,D-5205 ST AUGUSTIN,FED REP GER

来源：

MICROPROCESSING AND MICROPROGRAMMING | 1988年 / 24卷 / 1-5期

关键词：

D O I：

10.1016/0165-6074(88)90059-2

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：233 / 238

页数：6

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