REDUCING V(BE) WAFER SPREAD OF BIPOLAR-TRANSISTOR VIA A COMPENSATION CIRCUIT

被引：4
|
作者：
AMADOR, R
POLANCO, A
HERNANDEZ, H
GONZALEZ, E
NAGY, A
机构：
[1] Centro de Investigaciones en Microelectrónica, Instituto Superior Politécnico, José Antonio Echeverría, Ciudad Habana 8
来源：
ELECTRONICS LETTERS | 1992年 / 28卷 / 15期
关键词：
MEASUREMENT; INTEGRATED CIRCUITS; CIRCUIT THEORY AND DESIGN;
D O I：
10.1049/el:19920876
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A circuit which reduces the V(BE) wafer spread of a standard bipolar transistor in linear ICs is described. This compensation circuit takes advantage of the close correlation between I(s) and beta-r. The spread of V(BE) is the major source of output error in IC temperature sensors with intrinsic reference, which thereby require resistive trimming.
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页码：1378 / 1379
页数：2
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