A DIVIDED WORD-LINE STRUCTURE IN THE STATIC RAM AND ITS APPLICATION TO A 64K FULL CMOS RAM

被引:103
|
作者
YOSHIMOTO, M
ANAMI, K
SHINOHARA, H
YOSHIHARA, T
TAKAGI, H
NAGAO, S
KAYANO, S
NAKANO, T
机构
关键词
D O I
10.1109/JSSC.1983.1051981
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:479 / 485
页数:7
相关论文
共 21 条
  • [1] A 64KB FULL CMOS RAM WITH DIVIDED WORD LINE STRUCTURE
    YOSHIMOTO, M
    ANAMI, K
    SHINOHARA, H
    YOSHIHARA, T
    TAKAGI, H
    NAGAO, S
    KAYANO, S
    NAKANO, T
    ISSCC DIGEST OF TECHNICAL PAPERS, 1983, 26 : 58 - &
  • [2] A NMOS 64K STATIC RAM
    EBEL, AV
    ATWOOD, GE
    SO, EY
    LIU, SS
    KYNETT, VN
    JECMEN, RM
    MINGO, J
    DUN, HP
    ISSCC DIGEST OF TECHNICAL PAPERS, 1982, 25 : 254 - &
  • [3] CHARACTERIZATION OF AN ULTRA-HARD CMOS 64K STATIC RAM
    JENKINS, WC
    MARTIN, RL
    HUGHES, HL
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1987, 34 (06) : 1455 - 1459
  • [4] A 25 NS 64K STATIC RAM
    YAMANAKA, T
    KOSHIMARU, S
    KUDOH, O
    OZAWA, Y
    YASUOKA, N
    ITO, H
    ASAI, H
    HARASHIMA, N
    KIKUCHI, S
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (05) : 572 - 577
  • [5] A 30NS 64K CMOS RAM
    HARDEE, K
    GRIFFUS, M
    GALVAS, R
    ISSCC DIGEST OF TECHNICAL PAPERS, 1984, 27 : 216 - &
  • [6] A 15-NS CMOS 64K RAM
    SCHUSTER, SE
    CHAPPELL, BA
    FRANCH, RL
    GREIER, PF
    KLEPNER, SP
    LAI, FSJ
    COOK, PW
    LIPA, RA
    PERRY, RJ
    POKORNY, WF
    ROBERGE, MA
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1986, 21 (05) : 704 - 712
  • [7] A 20-NS-64K CMOS STATIC RAM
    MINATO, O
    MASUHARA, T
    SASAKI, T
    MATSUMOTO, K
    SAKAI, Y
    HAYASHIDA, T
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (06) : 1008 - 1013
  • [8] A 70 NS HIGH-DENSITY 64K CMOS DYNAMIC RAM
    CHWANG, RJC
    CHOI, M
    CREEK, D
    STERN, S
    PELLEY, PH
    SCHUTZ, JD
    WARKENTIN, PA
    BOHR, MT
    YU, K
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1983, 18 (05) : 457 - 463
  • [9] A BATTERY BACKUP 64K CMOS RAM WITH DOUBLE LEVEL ALUMINUM TECHNOLOGY
    WATANABE, T
    HAYASHI, M
    SASAKI, I
    AKATSUKA, Y
    HIROHIKO, T
    YAMAMOTO, H
    KUDOH, O
    TAKAHASHI, S
    HARA, T
    ISSCC DIGEST OF TECHNICAL PAPERS, 1983, 26 : 60 - 61
  • [10] A HIGH-SPEED 64K CMOS RAM WITH BIPOLAR SENSE AMPLIFIERS
    MIYAMOTO, JI
    SAITO, S
    MOMOSE, H
    SHIBATA, H
    KANZAKI, K
    IZUKA, T
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (05) : 557 - 563