共 50 条
- [1] SERIAL I-O THRUSTS INDECOMP INTO ASYNCHRONOUS COMMUNICATIONSEDN MAGAZINE-ELECTRICAL DESIGN NEWS, 1978, 23 (15): : 89 - 97CONWAY, J
- [2] MU-P WITH MEMORY-MAPPED I-O AVOIDS SERIAL I-O SPEED PENALTYELECTRONIC DESIGN, 1980, 28 (24) : 301 - 302ZARNESCU, S
- [3] CUMULATIVE ALGEBRAIC ADDER ACTING AS A SIMPLE I-O PORTELECTRONIC ENGINEERING, 1981, 53 (652): : 25 - &MILUTINOVIC, V
- [4] IDENTIFY FAILING BITS QUICKLY - DESIGN A PORTABLE SERIAL I-O MONITORELECTRONIC DESIGN, 1979, 27 (17) : 92 - 94STETSON, RJ
- [5] BIMAPPED PORT ACCEPTS BOTH I-O AND MEMORY-REFERENCE INSTRUCTIONSELECTRONIC DESIGN, 1979, 27 (22) : 116 - 116MASTER, MH
- [7] FAST ON-CHIP SERIAL I-O DISTINGUISHES PHILIPS FAMILY OF 5 MICROCOMPUTERSELECTRONICS-US, 1980, 53 (24): : 78 - +GOSCH, J
- [8] Including I-O psychology content and principles in classrooms to increase I-O visibilityINDUSTRIAL AND ORGANIZATIONAL PSYCHOLOGY-PERSPECTIVES ON SCIENCE AND PRACTICE, 2020, 13 (04): : 492 - 496Fletcher, Keaton A.French, Kimberly A.Kidwell, Kate E.Burnett, Claire E.