Design and development of broadband DC-10 GHz packaged RF MEMS switches with on chip CPW-microstrip transitions

被引:0
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作者
Shailendra Singh
M S Giridhar
Ashwini Jambhalikar
T K Pratheek
Supriya Akshaya
Deepak Kumar Gogulapati
Jiju Sharma
Jolly John
C V N Dhar
Rajeev Rao
Sangam Jyoti
机构
[1] Laboratory for Electro Optic Systems (ISRO),
[2] Space Applications Center (ISRO),undefined
[3] Gallium Arsenide Enabling Technology Center,undefined
来源
Sādhanā | 2022年 / 47卷
关键词
Coplanar waveguide; microstrip transmission line; RF MEMS switch; via less CPW-MS transitions; silicon bulk micromaching;
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学科分类号
摘要
This paper presents the design, fabrication and packaging of RF MEMS switches that have CPW-converted-to-microstrip RF interface at the die level. With microstrip input and output ports the packaging of the dies become greatly simplified, doing away with the need for having off-chip matching and RF transition components inside the package. Two designs are presented, each based on a different philosophy for conversion of the inherent CPW version of the chip to microstrip planar transmission line; i) conversion to microstrip through RF matching, ii) CPW to microstrip on-chip via less transition. Detailed 3D EM simulation based studies were carried out to arrive at the final RF layouts. The switches were fabricated using the silicon on glass architecture and packaged in hermetic RF packages at 1 atm N2\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$_2$$\end{document}. Wafer level and post packaging test methods are described. Over the range DC to 10 GHz, the worst case packaged device insertion loss, return loss and isolation are −1.2 dB, −13 dB, −37.5 dB for the first design variant of the switch and are −1.2 dB, −11 dB and −30 dB respectively for the second design variant. The typical pull in voltage is 50 V.
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