Due to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain (S21\documentclass[12pt]{minimal}
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\begin{document}$$S21$$\end{document}) of 18.87 dB, minimum noise figure (NFmin.\documentclass[12pt]{minimal}
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\begin{document}$${NF}_{min.}$$\end{document}) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of 0.40mm2\documentclass[12pt]{minimal}
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\begin{document}$$0.40{\mathrm{ mm}}^{2}$$\end{document} and the post-layout validation is performed using Cadence SpectreRF circuit simulator.