A novel reversible 2–1 multiplexer scheme in quantum-dot cellular automata

Reversible logic is a methodology to reduce energy loss in digital circuits. This logic can be used in circuit implementation with quantum-dot cell automata (QCA) technology to achieve extremely low circuit energy consumption compared to CMOS. This and other features make QCA an excellent alternative to CMOS circuits. This nanoscale technology offers great opportunities to design and implement high performance and energy efficient logic circuits. This article presents a new scheme for reversible 2–1 multiplexer in QCA. The proposed scheme is implemented in QCADesigner and compared with previous works. Simulation results show the superiority of the scheme in terms of the number of cells, area requirement, and latency.