Lightweight Design-for-Security Strategies for Combined Countermeasures Against Side Channel and Fault Analysis in IoT Applications

被引:0
|
作者
Sikhar Patranabis
Debapriya Basu Roy
Anirban Chakraborty
Naveen Nagar
Astikey Singh
Debdeep Mukhopadhyay
Santosh Ghosh
机构
[1] Indian Institute of Technology Kharagpur,Department of Computer Science and Engineering
[2] Indian Institute of Technology Kharagpur,Department of Electrical Engineering
[3] Intel Corporation 2111 NE 25th Ave,Intel Labs
关键词
Design-for-security; Side-channel attacks; Fault attacks; Countermeasures; Lightweight; Masking; Shuffling; Fault space transformation; IoT applications side channels; Threshold implenentations;
D O I
10.1007/s41635-018-0049-y
中图分类号
学科分类号
摘要
The Internet-of-Things today gives rise to a number of applications that require lightweight cryptographic primitives, such as block ciphers for secure and efficient computation using very little resources. This paper addresses the open problem of design-for-security methodologies for constructing such lightweight block ciphers with combined protection against both side channel and fault attacks. We propose novel design strategies that, unlike existing methodologies, are equipped with target-specific design choices. Our first proposal is the incorporation of lightweight linear layers that combine good diffusion properties with fault attack resistance via fault space transformation. Our second proposal is to make S-Box choices using a new metric called the modified transparency order, so as to facilitate a lightweight masking strategy where the mask is only periodically refreshed. Our third and final proposal is to implement a cipher-dependent multi-round shuffling technique that is lightweight and affords greater security than the standard shuffling schemes in the literature. Each of our propositions are assembled into one single construction for a PRESENT-like block cipher, that consumes 15% less look-up tables on a Xilinx xc5vlx50 FPGA than all existing threshold implementations of PRESENT, and provides good security guarantees against both fault and side-channel attacks. In particular, it resists both classical and biased fault attacks, and does not exceed the safety threshold against side-channel attacks over 50,000 power traces, collected on a SASEBO GII board.
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页码:103 / 131
页数:28
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