Hardware Implementation of Image Dehazing Mechanism using Verilog HDT, and Parallel DCP

被引:0
|
作者
Ghosh, Avra [1 ]
Roy, Sangita [2 ]
Chaudhuri, Sheli Sinha [1 ]
机构
[1] Jadavpur Univ, ETCE Dept, Kolkata, India
[2] Narula Inst Technol, ECE Dept, Kolkata, India
来源
PROCEEDINGS OF 2020 IEEE APPLIED SIGNAL PROCESSING CONFERENCE (ASPCON 2020) | 2020年
关键词
Verilog HDL; parallel DCP; airtight; haze removal; real time;
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
In image processing technology, one of the prime applications is the dehazing process. And it is still a challenge in implementing the corresponding algorithm in hardware. In this paper we propose an atmospheric light estimation method without any complex logic. This makes easy implementation on hardware level. We have also used the Independent Transmission Rate Estimation (ITRE) for calculation of transmission coefficient parallel to the calculation of the atmospheric light. This procedure enhances the time complexity and the quality of the dehazed image. Compared to other logic studies this logic shows a competitive response.
引用
收藏
页码:283 / 287
页数:5
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