An ECC-Free MLC STT-RAM based Approximate Memory Design for Multimedia Applications

被引:3
|
作者
Liu, Zihao [1 ]
Liu, Tao [1 ]
Guo, Jie [2 ]
Wu, Nansong [3 ]
Wen, Wujie [1 ]
机构
[1] Florida Int Univ, Miami, FL 33199 USA
[2] Hewlett Packard Corp, Palo Alto, CA USA
[3] Arkansas Tech Univ, Russellville, AR 72801 USA
关键词
IMAGE COMPRESSION; WAVELET TRANSFORM;
D O I
10.1109/ISVLSI.2018.00035
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Exponential growth of high-end multimedia data processing requirement produces sharply increasing demand on memory capacities of modern computer systems and mobile platforms. As a next generation memory technology, Multi-level Cell Spin-Transfer Torque Random Access Memory (MLC STT-RAM) is a promising candidate for high-performance and high density applications. However, its multi-bit per cell advantage has been significantly compromised by the redundant memories to overcome the severe reliability concerns. In this paper, we demonstrate that the compressed image data can exhibit very asymmetric error tolerance capabilities across various layers and resolutions. We then propose a reconfigurable high density MLC STT-RAM approximate memory design by leveraging such nature of the compressed data. Our tri-zone design can offer dynamic configuration among half-state, tristate and full-state to satisfy the run-time error requirement without incurring extra error correction overheads. Simulation results show that our design can boost the storage capacity significantly with marginal image quality degradation.
引用
收藏
页码:142 / 147
页数:6
相关论文
共 33 条
  • [1] Progressive Scaled STT-RAM for Approximate Computing in Multimedia Applications
    Zeinali, Behzad
    Karsinos, Dimitrios
    Moradi, Farshad
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2018, 65 (07) : 938 - 942
  • [2] A Design Guideline for Volatile STT-RAM with ECC and Scrubbing
    Kim, Namhyung
    Choi, Kiyoung
    2015 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2015, : 29 - 30
  • [3] Promoting MLC STT-RAM For the Future Persistent Memory System
    Chen, Xunchao
    Wang, Jun
    Zhou, Jian
    2017 IEEE 15TH INTL CONF ON DEPENDABLE, AUTONOMIC AND SECURE COMPUTING, 15TH INTL CONF ON PERVASIVE INTELLIGENCE AND COMPUTING, 3RD INTL CONF ON BIG DATA INTELLIGENCE AND COMPUTING AND CYBER SCIENCE AND TECHNOLOGY CONGRESS(DASC/PICOM/DATACOM/CYBERSCI, 2017, : 1180 - 1185
  • [4] Restore-Free Mode for MLC STT-RAM Caches
    Qureshi, Muhammad Avais
    Kim, Hyeonggyu
    Kim, Soontae
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 27 (06) : 1465 - 1469
  • [5] MLC STT-RAM Design Considering Probabilistic and Asymmetric MTJ Switching
    Zhang, Yaojun
    Zhang, Lu
    Chen, Yiran
    2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2013, : 113 - 116
  • [6] A Case of Precision-Tunable STT-RAM Memory Design for Approximate Neural Network
    Wang, Ying
    Song, Lili
    Han, Yinhe
    Cheng, Yuanqing
    Li, Huawei
    Li, Xiaowei
    2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 1534 - 1537
  • [7] Multi-level cell STT-RAM controller for multimedia applications
    Jang, Wooyoung
    ELECTRONICS LETTERS, 2017, 53 (01) : 12 - 13
  • [8] TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations
    Liu, Zihao
    Mao, Mengjie
    Liu, Tao
    Wang, Xue
    Wen, Wujie
    Chen, Yiran
    Li, Hai
    Wang, Danghui
    Pei, Yukui
    Ge, Ning
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2018, 37 (10) : 1985 - 1998
  • [9] A Heterogeneous Design Methodology for STT-RAM Memory System of Mobile SoC
    Lv, Minjie
    Sun, Hongbin
    Min, Tai
    Zhang, Tong
    Zheng, Nanning
    2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012), 2012, : 1163 - 1165
  • [10] Optimizing MLC-based STT-RAM Caches by Dynamic Block Size Reconfiguration
    Wang, Jianxing
    Roy, Pooja
    Wong, Weng-Fai
    Bi, Xiuyuan
    Li, Hai
    2014 32ND IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2014, : 126 - 131