SRTM mission: Results of a real time one-bit processor

被引：0

作者：

Franceschetti, G ^{[1
]}

Impagnatiello, F ^{[1
]}

Rubertone, F ^{[1
]}

Tesauro, M ^{[1
]}

Wall, SD ^{[1
]}

机构：

[1] Univ Naples Federico II, Dipartimento Ingn Elettron & Telecomunicazioni, I-80125 Naples, Italy

来源：

2000 IEEE AEROSPACE CONFERENCE PROCEEDINGS, VOL 5 | 2000年

关键词：

D O I：

暂无

中图分类号：

V [航空、航天];

学科分类号：

08 ; 0825 ;

摘要：

An experimental real time one-bit (hardware) processor has been realized and is planned to operate in connection and during the Space Radar Topography Mission (SRTM). This is the first single pass interferometric Synthetic Aperture radar (SAR) in the space mounting onboard two radar receivers. During the mission, part of the X-SAR raw data will be down-linked, re-coded at one bit and convolved (in time domain) with a one-bit coded filter function, to generate real-time images and associate interferometric fringes. The experiment is expected to be relevant to the emerging area of on-board real time processing (reduced weight and power consumption) and deep space microwave imaging (bandwidth saving). Results of the experiment are presented. The processor performance and (geometric and radiometric) image quality are discussed.

引用

页码：13 / 26

页数：14

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