A Fully Integrated Transmitter with Embedded Antenna for On-Wafer Wireless Testing

被引:3
|
作者
Park, Piljae [1 ,2 ]
Chen, Luis [1 ]
Yu, Hyun-Kyu [2 ]
Yue, C. Patrick [1 ]
机构
[1] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
[2] ETRI, SoC Res Lab, Taejon 305350, Yuseong, South Korea
关键词
Image reject transmitter; in-phase/quadrature (I/Q) mismatch; on-chip antenna; process control monitoring (PCM); wireless testing; CHIP ANTENNAS; SILICON;
D O I
10.1109/TMTT.2010.2042855
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a fully integrated transmitter with embedded on-chip antennas to demonstrate on-wafer wireless testing. First, on-chip antenna characterization methods based on the measured transmission link gain are described. From the measured transmission link gain, the on-chip antenna gain is determined using the known transmitter gain, a path loss, and an off-chip antenna gain. The proposed two-step method utilizes a high-gain off-chip antenna transmission link for base line calibration data to obtain better gain accuracy. For wireless testing, a fully integrated a 1.2-GHz Hartley image-reject transmitter is implemented in an 40-GHz f(t) InGaP/ GaAs HBT process. The image rejection (IR) ratio is measured to demonstrate process control monitoring of device mismatches. Both dipole and loop antennas are integrated to study their radiation efficiency as their dimensions are much less than the wavelength. The loop antenna provides about 7 dB better transmission gain. The IR ratio is measured wirelessly from a number of samples to monitor the die-to-die variations in the in-phase/quadrature mismatch. Monte Carlo simulations are used to aid the analysis of the sources of amplitude and phase mismatches.
引用
收藏
页码:1456 / 1463
页数:8
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