A Reliability Lab-on-chip Using Programmable Arrays

被引：0
|
作者：
Pfeifer, Petr [1 ]
Kaczer, Ben [2 ]
Pliva, Zdenek [1 ]
机构：
[1] Tech Univ Liberec, Inst Informat Technol & Electron, Fac Mechatronic Informat & Interdisciplinary Stdy, Studentska 2/1402, Liberec, Peoples R China
[2] IMEC, B-3001 Louvain, Belgium
来源：
2014 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | 2014年
关键词：
reliability; in-situ methods; aging; Field Programmable Gate Array (FPGA);
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a new concept of a reliability labon-chip-an ultimate platform for complete in-situ measurement, processing and evaluation of a chip reliability parameters, including aging purposes. It is shown how multiple test structures, including the measurement blocks, can be ad-hoc created and evaluated directly on a Field-Programmable Gate Array (FPGA) chip. Results from measurements including 45 nm and 28 nm processes are presented as well.
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页数：8
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