Steep-Slope WSe2 Negative Capacitance Field-Effect Transistor

被引:108
|
作者
Si, Mengwei
Jiang, Chunsheng
Chung, Wonil
Du, Yuchen
Alam, Muhammad A.
Ye, Peide D. [1 ]
机构
[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
基金
美国国家科学基金会;
关键词
Tungsten diselenide; negative capacitance; ferroelectric oxide; steep slope; internal metal gate; HIGH-PERFORMANCE WSE2; MOS2; CONTACTS;
D O I
10.1021/acs.nanolett.8b00816
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
P-type two-dimensional steep-slope negative capacitance field-effect transistors are demonstrated for the first time with WSe2 as channel material and ferroelectric hafnium zirconium oxide in gate dielectric stack. F4-TCNQ is used as p-type dopant to suppress electron leakage current and to reduce Schottky barrier width for holes. WSe2 negative capacitance field-effect transistors with and without internal metal gate structures and the internal field-effect transistors are compared and studied. Significant SS reduction is observed in WSe2 negative capacitance field-effect transistors by inserting the ferroelectric hafnium zirconium oxide layer, suggesting the existence of internal amplification (similar to 10) due to the negative capacitance effect. Subthreshold slope less than 60 mV/dec (as low as 14.4 mV/dec) at room temperature is obtained for both forward and reverse gate voltage sweeps. Negative differential resistance is observed at room temperature on WSe2 negative capacitance field-effect-transistors as the result of negative capacitance induced negative drain-induced-barrier-lowering effect.
引用
收藏
页码:3682 / 3687
页数:6
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