Computation complexity analysis and VLSI architectures of shape coding for MPEG-4

被引:7
|
作者
Gong, DN [1 ]
He, Y [1 ]
机构
[1] Tsinghua Univ, Dept Elect Engn, State Key Lab Microwave & Digital Commun, Beijing 100084, Peoples R China
关键词
MPEG-4; VLSI architectures; shape coding; computation complexity;
D O I
10.1117/12.386564
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
There are huge bit-level operations in shape coding algorithms for MPEG-4. These bit-level operations make it difficult to implement real-time MPEG-4 coding in the general-purpose processor without any hardware support. This paper first gives the analysis of computation complexity in MPEG-4 shape coding algorithms. Then a dedicated VLSI architecture to accelerate shape coding, which is called Shape Engine, is proposed. Shape Engine is composed of three dedicated but flexible processors element (PE) namely PB-PE, Filtering-PE and CAE-PE. The combination of RISC core and Shape Engine leads to a great speed up over pure software implementation of MPEG-4 shape coding.
引用
收藏
页码:1459 / 1470
页数:12
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